1. Field of the Invention
The present invention relates to a local etching method and a local etching apparatus for making a thickness distribution of a semiconductor wafer uniform by locally etching to planarize a projected portion of a surface of a semiconductor wafer, or locally etching a relatively thick portion of a semiconductor wafer by blowing activated species gas.
2. Description of the Related Art
FIG. 1 is an explanatory view for explaining principle of a wafer planarizing method by a local etching method using plasma. Notation 100 designates a plasma generating portion and activated species gas G in plasma generated at the plasma generating portion 100 is injected from a nozzle 101 to a surface of a semiconductor wafer W. The semiconductor wafer W is fixedly mounted onto a stage 120 and the stage 120 is moved at speed controlled in a horizontal direction relative to the nozzle 101.
Initially, a thickness of the semiconductor wafer W differs in accordance with a location of the surface. Prior to etching, for a semiconductor wafer W, a thickness of each subdivided area thereof is measured. By the measurement, there is provided data corresponding a position of the respective area and the thickness of the position, that is, position-thickness data. According to the local etching method, an amount of removing a material at the respective region corresponds to a time period of exposing the area to the activated species gas G. Therefore, relative speed for passing the nozzle relative to the semiconductor wafer (hereinafter, referred to as nozzle speed) is determined to speed by which the nozzle is moved at a low speed above a relatively thick portion (hereinafter, referred to as relatively thick portion) Wa and at relatively high speed at a relatively thin portion.
FIG. 2 is a graph showing a distribution of an amount (depth) of a semiconductor wafer material per unit time removed by the activated species gas injected from the nozzle 101, that is, an etching rate. The curve referred to as an etching rate profile is a curve very similar to a Gaussian distribution. As shown in FIG. 2, the etching rate E is provided with a maximum value Emax on a center line of the nozzle 101 and is reduced as the location becomes remote from the center in a radius r direction.
Further, normally, the half value width is used as an index of a diameter of etching (that is, index which does not critically indicate a range to which etching effects but simply expressing a smoothly changing etching rate). In this specification, a half of the half value width is referred to as half value radius.
Since material removing capacity shows a distribution in accordance with a distance from the center of the nozzle in this way, a material removing amount requested for one area cannot be determined only by speed of the nozzle at the one area. The reason is that even when the material is removed by a necessary amount in the one area, when etching is carried out for a contiguous area or an area contiguous thereto, the material is removed in accordance with the above-described etching rate profile also for the initial area.
In this way, a single area is effected with influence of etching for all of the other areas and therefore, the speed of the nozzle is calculated such that heights of surfaces of the respective areas become equal to each other as a result of superposing material removing amounts by influence of these for all the areas.
Conventionally, the above-described etching rate profile has been considered to always remain unchanged regardless of the position of the nozzle relative to the semiconductor wafer W. Further, it has been found that considerable dissociation is observed between a material removing amount calculated based on the premise and a material removing amount actually provided, particularly at a location proximate to an outer edge of the semiconductor wafer as is seen in FIG. 3. That is, it has been found that there is observed a tendency that an accurate result of working is difficult to obtain at the vicinity of the outer edge. Further, FIG. 3 shows a behavior in which the material of a corner portion of the semiconductor wafer surrounded by a dotted line is excessively removed at a portion surrounded by the dotted line and intended planarization is not provided.
As a result of various experiments, there is provided knowledge that the dissociation is caused by deforming the etching rate profile at the vicinity of the outer edge of the semiconductor wafer. The inventors have proposed a local dry etching method (Japanese Patent Application 2001-047674) in consideration of the deformation of the etching rate profile based on the knowledge.
It is the problem of the invention to provide a local dry etching method by a method different from the above-described local dry etching method.